Array-type processor having plural processor elements controlled by a state control unit

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United States of America Patent

PATENT NO 8151089
APP PUB NO 20040107332A1
SERIAL NO

10694822

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Abstract

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A multiplicity of processor elements that are arranged in rows and columns individually execute data processing in accordance with instruction codes that are individually set as data and supply event data as output. A state control unit is composed of a plurality of units that successively switch the instruction codes of the multiplicity of processor elements in accordance with a computer program and the event data, these state control units communicating with each other to realize linked operation as necessary. An event distributing means distributes event data to this plurality of state control units that intercommunicate to realize linked operation, whereby the plurality of state control units can realize linked operation to control a large-scale state transition.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATIONTOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Anjo, Kenichiro Kanagawa, JP 19 243
Awashima, Toru Kanagawa, JP 15 101
Fujii, Taro Kanagawa, JP 37 360
Furuta, Koichiro Kanagawa, JP 35 372
Motomura, Masato Kanagawa, JP 47 1176
Nakamura, Noritsugu Kanagawa, JP 15 130
Toi, Takao Kanagawa, JP 28 243
Yabe, Yoshikazu Kanagawa, JP 18 199

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