Method for managing virtual and actual performance states of logical processors in a multithreaded processor using system management mode
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United States of America Patent
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May 15, 2007
Grant Date -
Jun 3, 2004
app pub date -
Nov 30, 2002
filing date -
Nov 30, 2002
priority date (Note) -
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Abstract
A power management technique uses system management interrupt (SMI) to manage performance states of logical processors in a physical processor. Each logical processor is associated with a virtual performance state and an actual performance state. A request to retrieve or to change the virtual performance state causes the SMI to be generated. The virtual performance state is a state known to an operating system (OS). The actual performance state is a state that the logical processor is operating at.
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