Method for detecting logical address of flash memory
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United States of America Patent
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Issued Date -
Jun 10, 2004
app pub date -
Dec 9, 2002
filing date -
Dec 9, 2002
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
The present invention is to provide a method for detecting the logical address of the flash memory. At the beginning of power-on a system, the present invention is to construct a scaled factor logical/physical address mapping table (AMT) which is using a zone as an unit. The present invention utilizes the address mapping table to obtain a physical zone corresponding to the logical address and then sequentially search each block of the physical zone until to obtain the physical address corresponding to the awaited-searching logical address. Hence, the present invention can obtain an effectively balance between the process speed and the space. The present invention does not occupy too much space on the premise of keeping fast processing speed.
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