Two dimensional data eye centering for source synchronous data transfers
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United States of America Patent
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Apr 25, 2006
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app pub date -
Dec 19, 2002
filing date -
Dec 19, 2002
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Abstract
A method for optimizing a source synchronous clock reference signal timing to capture data from a memory device (e.g., DDR SDRAM) includes conducting an iterative two-dimensional data eye search for optimizing the delay of the source synchronous clock reference signal (e.g., DQS). Embodiments of the present invention are directed to tuning the delay for each device for the optimal margin in two dimensions: maximize the distance from the data eye walls and maximize the noise margin on the interface. An iterative data eye search is performed while varying the DQS delay timing and noise margin.
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