GPS (Global Peak current Searching) Algorithm based on Gate-Level Power Analysis
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Jul 29, 2004
app pub date -
Feb 7, 2003
filing date -
May 3, 2002
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
Detecting power and IR-drop is indispensable design process because todays circuits are very power and timing critical. Many approaches provide good solutions for average power consumption and average IR-drop. However, there are few methods in detecting peak power and peak IR-drop. Obviously, peak power and IR-drop are more informative to know real working behavior of a chip than average power and IR-drop. Unfortunately, detection of peak power(current) of a system uses time-consuming process employing normal power calculation for small time regions. This patent suggests a high-speed method with linear complexity for detecting the peak power regions. Once we know peak regions, we can analyze those regions in details.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully