Semiconductor die package with reduced inductance and reduced die attach flow out
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United States of America Patent
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Jan 16, 2007
Issued Date -
N/A
app pub date -
Feb 10, 2003
filing date -
Feb 10, 2003
priority date (Note) -
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status (Latency Note)
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Abstract
In one exemplary embodiment, a structure comprises a substrate having a top surface, and a die attach pad situated on the top surface of the substrate. The die attach pad includes a die attach region and at least one substrate ground pad region electrically connected to the die attach region. The die attach pad further includes a die attach stop between the die attach region and the at least one substrate ground pad region. The die attach stop acts to control and limit die attach adhesive flow out to the at least one substrate ground pad region during packaging so that the at least one substrate ground pad region can be moved closer to die attach region so that shorter bond wires for connecting the at least one substrate ground pad region to a die wire bond pad may be used during packaging.
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