Network switch memory interface configuration
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United States of America Patent
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-
Dec 18, 2007
Grant Date -
Sep 9, 2004
app pub date -
Mar 15, 2004
filing date -
Mar 17, 1999
priority date (Note) -
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Abstract
A network switch for network communications includes a first data port interface, wherein the first data port interface supports a plurality of data ports for transmitting and receiving data at a first data rate. The network switch also includes a second data port interface, wherein the second data port interface supports a plurality of data ports for transmitting and receiving data at a second data rate, along with a third data port interface for transmitting and receiving data at a third data rate. A CPU interface is provided and configured to communicate with a CPU. The switch includes a first, second and third internal memory communicating with the first, second and third data port interface. A first and second memory management unit for communicating data and to control access to and from the second internal memory, are also provided. A communication channel is provided for communicating data and messaging information.
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