Structures for testing circuits and methods for fabricating the structures
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United States of America Patent
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Issued Date -
Sep 16, 2004
app pub date -
Mar 12, 2003
filing date -
Mar 12, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
One embodiment of the present invention is a method for fabricating a structure useful for testing circuits that includes steps of: (a) aligning interconnectors with a Probe Card; (b) aligning a substrate with the interconnectors; and (c) connecting the interconnectors to the Probe Card and the substrate; wherein the interconnectors are electrical conductors that have at least a core that does not change shape as a result of applying heat during the step of connecting.
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