Importance

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Abstract

A nonvolatile memory cell array is formed by arranging a plurality of storage memory cells in array. A plurality of bit lines are used to electrically connect memory cells on transversal rows. A plurality of word lines are used to electrically connect memory cells on longitudinal columns. The combination of each word line and each bit line represents a specific storage memory cell. The source of the transistor in each storage memory cell is electrically connected to a corresponding word line, while the gate and drain thereof are electrically together connected to a corresponding bit line. Therefore, the area of memory cell can be effectively shrunk, and the integration density of memory cell can also be effectively enhanced.

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First Claim