Semiconductor memory device and electronic device
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Issued Date -
Jan 6, 2005
app pub date -
May 4, 2004
filing date -
May 15, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
In the semiconductor memory device of the invention, when a write enable signal supplied from an external device changes to an active level representing a data writing request, an access controller triggers execution of a write access operation for a preset time period at a return timing of the write enable signal to an inactive level. This arrangement desirably eliminates the long rate restriction of the semiconductor memory device.
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