Stacked chip assembly with encapsulant layer

United States of America Patent

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Oct 20, 2009
Grant Date
Feb 17, 2005
app pub date
Aug 22, 2002
filing date
Aug 22, 2001

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Abstract

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of the substrate for facilitating handling and testing of the subassembly.

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Patent Owner(s)

TESSERA, INC.

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H01L:SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICE....

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Inventor(s)

Inventor Name	Address	# of filed Patents	Total Citations
Mohammed, Ilyas	Santa Clara , US	305	7578

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Stacked chip assembly with encapsulant layer

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United States of America Patent

10487482

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PATENT NO	7605479
APP PUB NO	20050035440A1
SERIAL NO	10487482
DOCKET NO

US Family Size	Non-US Coverage
Patent Longevity	Forward Citations

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
October 20, 2009	US,7605479,B2 US7605479B2	GRANTED PATENT AS SECOND PUBLICATION
February 17, 2005	US,20050035440,A1 US20050035440A1	FIRST PUBLISHED PATENT APPLICATION

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