Synchronizing unit for redundant system clocks

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United States of America Patent

APP PUB NO 20050052252A1
SERIAL NO

10891886

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Abstract

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Phase detecting and alignment of an active and a back-up clock are provided by a detector and controller. Two delay lines of differing resolution function to delay the clock and are themselves controlled to minimize or substantially eliminate the phase drift between the back-up clock from one timing module and the main clock from another timing module. In particular, both a coarse delay line and a fine delay line are adjusted based on set thresholds that are used to determine the direction of the necessary phase correction for each of the delay lines. In one particular embodiment, the coarse delay line governs the gross phase adjustments which propagate through the timing module and are, in turn, utilized to make finer adjustments to the fine delay line and achieve minimal phase delay between the main clock and the backup clock.

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Patent Owner(s)

Patent OwnerAddress
SIEMENS COMMUNICATIONS INC900 BROKEN SOUND BLVD BOCA RATON FL 33487

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Galibois, Joseph F Bedford, NH 1 4

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