Method for efficiently controlling read/write of flash memory
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United States of America Patent
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N/A
Issued Date -
Mar 10, 2005
app pub date -
Sep 3, 2004
filing date -
Sep 5, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A method for efficiently controlling read/write of a flash memory is proposed, wherein two address mapping tables and an empty block FIFO mechanism are built. A zone address mapping table matched with its empty block FIFO data is used for the logical address of the file allocation table (FAT). When a host end performs read/write to a flash memory, no matter to which zone the zone address mapping table corresponds, it is not necessary to rebuild the FAT address mapping table. Moreover, a cache address mapping table and its empty block FIFO data can be added. When the logical address is not in the zone address mapping table and the FAT address mapping table, a smaller cache address mapping table is first built to increase the system speed, let control of the flash memory be more efficient, and distribute the utility rate of each block.
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