Non-volatile memory and method with bit line compensation dependent on neighboring operating modes
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United States of America Patent
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Oct 18, 2005
Grant Date -
Mar 17, 2005
app pub date -
Sep 17, 2003
filing date -
Sep 17, 2003
priority date (Note) -
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Abstract
When programming a contiguous page of memory storage units, every time a memory storage unit has reached its targeted state and is program-inhibited or locked out from further programming, it creates a perturbation on an adjacent memory storage unit still under programming. The present invention provides as part of a programming circuit and method in which an offset to the perturbation is added to the adjacent memory storage unit still under programming. The offset is added as voltage offset to a bit line of a storage unit under programming. The voltage offset is a predetermined function of whether none or one or both of its neighbors are in a mode that creates perturbation, such as in a program inhibit mode. In this way, an error inherent in programming in parallel high-density memory storage units is eliminated or minimized.
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