Redundant memory self-test
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United States of America Patent
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Issued Date -
Mar 24, 2005
app pub date -
Sep 23, 2003
filing date -
Sep 23, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A built-in-self-test circuit selectively couples memory outputs to fault detection circuitry during a self-test, thereby reducing the size of fault detection circuitry and storage required to properly test and repair a memory with multi-dimensional redundancy. The circuit may store information concerning memory elements having the greatest number of faults and select these for replacement prior to addressing redundancy in another dimension. Redundancy may then be allocated in the other dimension to repair any remaining faults. When a memory element, such as a column, has a greater number of fails than the number of perpendicular redundant elements, the memory element may be identified for immediate replacement.
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