Methods and systems for Viterbi decoding

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United States of America Patent

PATENT NO 7287212
APP PUB NO 20050071735A1
SERIAL NO

10948545

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An execution unit and method for performing Viterbi decoding is provided. The instruction may be built into an execution unit which executes other instructions, or in its own execution unit. In an example implementation, the instruction is used in implementing the central-office modem (ATU-C) of an asymmetric digital subscriber line ('ADSL') system. In the example implementation, the new instruction takes as input eight input metrics and eight state metrics, and returns as output eight updated state metrics and eight decision bytes. The decision bytes contain: two `path` bits to enable the previous state to be quickly identified; bits to enable the input bits to be quickly identified; and a carry bit to allow the full value of a state metric to be reconstructed, even though during the calculation only the bottom bits are calculated.

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Patent Owner(s)

  • AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dobson, Timothy M Cambridge, GB 3 2
Wilson, Sophie Cambridge, GB 38 367

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