Methods for manufacturing stacked gate structure and field effect transistor provided with the same

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United States of America Patent

PATENT NO 7101777
APP PUB NO 20050074957A1
SERIAL NO

10864320

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Abstract

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The present invention provides a method for manufacturing a stacked-gate structure in a semiconductor device. The method includes the steps of sequentially forming a gate dielectric layer, a poly-silicon layer, a titanium layer, and a WN.sub.X layer on a semiconductor substrate, carrying out a rapid thermal annealing (RTA) in a nitrogen ambient, forming a silicon nitride layer on the tungsten layer, and patterning the multilayer thin-film structure into a predetermined configuration.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
NANYA TECHNOLOGY CORPORATIONTAOYUAN946

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ho, Tzu-En Jiaosi Township, TW 7 31
Wu, Chang-Rong Banciao, TW 32 184

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