Determining an arrangement of data in a memory for cache efficiency
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United States of America Patent
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Issued Date -
Apr 28, 2005
app pub date -
Oct 23, 2003
filing date -
Oct 23, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
There is provided a cache that includes a cache line, and an indicator associated with a unit-sized portion of the cache line. The indicator indicates whether the unit-sized portion is accessed. A method for determining an arrangement of data in a memory for efficient operation of a cache includes determining whether the unit of the data is accessed during an execution of code, and compiling the code to place the unit in a line of the memory if the unit is accessed during the execution. The line of the memory is designated to contain, in contiguous locations, a plurality of units of the data that are accessed during the execution.
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