Semiconductor memory device in which source line potential is controlled in accordance with data programming mode
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United States of America Patent
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Jun 6, 2006
Grant Date -
May 5, 2005
app pub date -
Dec 6, 2004
filing date -
Jun 9, 2000
priority date (Note) -
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Abstract
There is provided a semiconductor memory device, which realizes rewriting of data in the memory cell by applying a potential difference between the gate and the source, or applying a potential difference between the gate and the drain, which is larger than the power supply voltage. This semiconductor memory device is provided with a source line potential control circuit configured to control the source line potential. The source line potential control circuit sets the source line potential at the time of the mode for programming '1' data in a plurality of blocks in one package to a level lower than at the normal data programming mode.
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