Test system with interconnect having conductive members and contacts on opposing sides

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United States of America Patent

SERIAL NO

10998269

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Abstract

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A method for fabricating semiconductor components and interconnects includes the steps of providing a substrate, such as a semiconductor die, forming external contacts on opposing sides of the substrate by laser drilling vias through the substrate, and forming conductive members in the vias. The conductive members include enlarged terminal portions that are covered with a non-oxidizing metal. The method can be used to fabricate stackable semiconductor packages having integrated circuits in electrical communication with the external contacts. The method can also be used to fabricate interconnects for electrically engaging packages, dice and wafers for testing or for constructing electronic assemblies.

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Patent Owner(s)

Patent OwnerAddress
FARNWORTH WARREN MNot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Farnworth, Warren M Nampa, ID 855 33428
Hembree, David R Boise, ID 392 15668
Wood, Alan G Boise, ID 415 23088

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