Method to reduce junction leakage current in strained silicon on silicon-germanium devices
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United States of America Patent
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Sep 16, 2008
Grant Date -
Jun 16, 2005
app pub date -
Jan 14, 2005
filing date -
Jun 18, 2003
priority date (Note) -
Expired
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Abstract
A MOSFET device in strained silicon-on-SiGe and a method of forming the device are described. The said device achieves reduced junction leakage due to the lower band-gap values of SiGe. The method consists of forming isolation trenches in a composite strained-Si/SiGe substrate and growing a liner oxide by wet oxidation such that oxidation is selective to SiGe only, with negligible oxidation of silicon surfaces. Selective oxidation results in oxide encroachment under strained-Si, thereby reducing the junction area after device fabrication is completed. Reduced junction area leads to reduced n.sup.+/p or p.sup.+/n junction leakage current.
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