Programmable device with dynamic DSP architecture
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United States of America Patent
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Jul 23, 2013
Grant Date -
Jun 30, 2005
app pub date -
Dec 21, 2004
filing date -
Dec 29, 2003
priority date (Note) -
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Abstract
Described is a programmable logic device (PLD) with columns of DSP slices that can be cascaded to create DSP circuits of varying size and complexity. Each slice includes a mode port that receives mode control signals for dynamically altering the function and connectivity of related slices. Such alterations can occur with or without reconfiguring the PLD.
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