Method of operation and controlling a memory device

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United States of America Patent

SERIAL NO

11030382

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method of operation of a memory device and system includes receiving a first and second value in embodiments. The first value is representative of a number of clock cycles of a clock signal that elapse between latching a column address and an access of data sensed from a row of memory cells in a memory array. A location of the data is based on the column address. The second value is representative of a number of clock cycles of the clock signal that elapse between the access of data from the memory array and outputting the data. The first and second values are received during an initialization sequence. Information in units of time that represents first and second timing parameters that pertains to the memory device is read from a storage location. The information that represents the first and second timing parameters are then converted from units of time to units of clock cycles to derive the first and second values.

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Patent Owner(s)

Patent OwnerAddress
BARTH RICHARD MNot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Barth, Richard M Palo Alto, CA 112 4698
Bystrom, Todd W Sunnyvale, CA 10 466
Davis, Paul G San Jose, CA 59 1922
Hampel, Craig E San Jose, CA 274 7129
May, Bradley A San Jose, CA 17 665
Tsern, Ely K Los Altos, CA 164 5376
Ware, Frederick A Los Altos Hills, CA 758 10960

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