Vertical integration of a MEMS structure with electronics in a hermetically sealed cavity
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jul 24, 2007
Grant Date -
Aug 4, 2005
app pub date -
Feb 2, 2004
filing date -
Oct 20, 2003
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A wafer-scale fabrication method for providing MEMS assemblies having a MEMS subassembly sandwiched between and bonded to a cap and a base is provided. The MEMS subassembly includes at least one MEMS device element flexibly connected to the MEMS assembly. The vertical separation between the MEMS device element and an electrode on the base is lithographically defined. Precise control of this critical vertical gap dimension is thereby provided. Fabrication cost is greatly reduced by wafer scale integration.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully