Pipeline and cache for processing data progressively

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United States of America Patent

APP PUB NO 20050206648A1
SERIAL NO

10802468

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Abstract

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A system for processing data includes a processing pipeline, a progressive cache, and a cache manager. The progressive cache includes stages connected serially to each other so that an output element of a previous stage is sent as an input element to a next stage. A first stage is configured to receive input for a processing request. A last stage is configured to produce output corresponding to the input. The progressive cache includes caches arranged in an order from least finished cache elements to most finished cache elements. Each cache of the progressive cache receives an output cache element of a corresponding stage of the processing pipeline and sends an input cache element to a next stage after the corresponding stage. The cache controller routes cache elements from the processing pipeline to the progressive cache in the order from a least finished cache element to a most finished cache element and from the progressive cache to the processing pipeline in the order from the most finished cache element to the next stage after the corresponding stage.

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Patent Owner(s)

Patent OwnerAddress
MITSUBISHI ELECTRIC RESEARCH LABORATORIES INC201 BROADWAY CAMBRIDGE MA 02139

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Frisken, Sarah F Cambridge, MA 49 843
Perry, Ronald N Cambridge, MA 60 1019

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