Device-level address translation within a programmable non-volatile memory device
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United States of America Patent
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May 22, 2007
Grant Date -
Oct 6, 2005
app pub date -
Mar 25, 2005
filing date -
Mar 25, 2004
priority date (Note) -
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Abstract
A programmable non-volatile memory device includes block switching logic that enables device-level translation rules to be changed. The device-level translation rules map the external addresses received by the flash memory device to the internal addresses of the programmable non-volatile memory device. Because the device-level translation rules are changeable, the physical location in the programmable non-volatile memory device to which an external address maps can be changed in a manner that is transparent to off-device operations. By allowing device-level translation rules to be changed, block management functions can be accomplished within the programmable non-volatile memory device itself.
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