Threshold and flatband voltage stabilization layer for field effect transistors with high permittivity gate oxides
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United States of America Patent
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Issued Date -
Nov 24, 2005
app pub date -
May 14, 2004
filing date -
May 14, 2004
priority date (Note) -
Abandoned
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Abstract
An insulating interlayer for use in complementary metal oxide semiconductor (CMOS) that prevents unwanted shifts in threshold voltage and flatband voltage is provided. The insulating interlayer is located between a gate dielectric having a dielectric constant of greater than 4.0 and a Si-containing gate conductor. The insulating interlayer of the present invention is any metal nitride, that optionally may include oxygen, that is capable of stabilizing the threshold and flatband voltages. In a preferred embodiment, the insulating interlayer is aluminum nitride or aluminum oxynitride and the gate dielectric is hafnium oxide, hafnium silicate or hafnium silicon oxynitride. The present invention is particularly useful in stabilizing the threshold and flatband voltage of p-type field effect transistors.
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