Formation of metal-insulator-metal capacitor simultaneously with aluminum metal wiring level using a hardmask

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United States of America Patent

PATENT NO 7301752
APP PUB NO 20050272219A1
SERIAL NO

10709907

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Disclosed is a method of fabricating a metal-insulator-metal (MIM) capacitor. In this method, a dielectric layer is formed above a lower conductor layer and an upper conductor layer is formed above the dielectric layer. The invention then forms an etch stop layer above the upper conductor layer and the dielectric layer, and forms a hardmask (silicon oxide hardmask, a silicon nitride hardmask, etc.) over the etch stop layer. Next, a photoresist is patterned above the hardmask, which allows the hardmask, the etch stop layer, the dielectric layer, and the lower conductor layer to be etched through the photoresist.

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Patent Owner(s)

  • GLOBALFOUNDRIES INC.

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Coolbaugh, Douglas D Essex Junction, VT 112 1156
Eshun, Ebenezer E Essex Junction, VT 72 908
Feilchenfeld, Natalie B Jericho, VT 34 338
Gautsch, Michael L Richmond, VT 6 36
He, Zhong-Xiang Essex Junction, VT 175 1738
Moon, Matthew D Jeffersonville, VT 21 185
Ramachandran, Vidhya Ossining, NY 65 803
Waterhouse, Barbara Richmond, VT 2 18

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