Method of increasing DDR memory bandwidth in DDR SDRAM modules
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United States of America Patent
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Apr 3, 2012
Grant Date -
Dec 15, 2005
app pub date -
May 25, 2005
filing date -
May 26, 2004
priority date (Note) -
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Abstract
The present invention provides a method of increasing DDR memory bandwidth in DDR SDRAM modules. DDR memory has an inherent feature called the Variable Early Read command, where the read command is issued one CAS latency before the termination of an ongoing data burst By using the Variable Early Read command the effect of the CAS latency is minimized in terms of the effect on bandwidth. The enhanced bandwidth technology achieved with this invention optimizes the remaining two access latencies (tRP and tRCD) for optimal bandwidth. These optimizations in the SPD allow for much better bandwidth in real world applications.
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