Cell library providing transistor size information for automatic circuit design

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20050278659A1
SERIAL NO

10857164

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Abstract

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A simple, approximate power optimization in connection with automatic large scale circuit design using a cell library is provided. The cell library of the present invention provides active region information for each cell, and preferably also provides conventional parameters such as cell physical area and cell performance information. Typically, several cells having differing parameters correspond to each cell function provided by the library. A cost function is defined which depends on active region information, and can also depend on physical area and performance. A cell design including cells selected from the library is optimized by substitution of functionally equivalent cells from the library to minimize the cost function. Minimization of active region area provides a simple way to approximately minimize power consumption. Optionally, a second optimization can be performed with a higher fidelity power model using the approximately power-minimized design as a starting point.

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Patent Owner(s)

Patent OwnerAddress
VERISILICON HOLDINGS CO LTD4699 OLD IRONSIDES DRIVE SUITE 270 SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Wang, Michael Xiaonan Stanford, CA 4 213
Zhang, Xiaonan Palo Alto, CA 69 734

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