Importance

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Abstract

A semiconductor integrated circuit has an SDRAM and a group of elements, whose power consumption is controlled (referred to as 'power-controlled block'). The power-controlled block includes a CPU and a memory control circuit. A power control circuit outputs a power-down signal to an output-fixing circuit when a power-saving mode setting command is supplied from the CPU. A control signal for commanding self-refresh operation is generated from the output-fixing circuit to the SDRAM. The power control circuit thereafter stops the supply of power to the entire power-controlled block in response to a power control signal. When a restart signal is provided, the power control circuit starts the supply of power to the power-controlled block. A power-saving mode release command is then generated from the CPU to the power control circuit, and the power-down signal is stopped. Thereupon, the output-fixing circuit provides a control signal generated from the memory control circuit directly to the SDRAM.

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First Claim