Method of forming sidewall spacer using dual-frequency plasma enhanced CVD
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United States of America Patent
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Apr 10, 2007
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app pub date -
Jun 29, 2004
filing date -
Jun 29, 2004
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Abstract
A silicon nitride spacer material for use in forming a PFET device and a method for making the spacer includes the use of a dual-frequency plasma enhanced CVD process wherein the temperature is in the range depositing a silicon nitride layer by means of a low-temperature dual-frequency plasma enhanced CVD process, at a temperature in the range 400.degree. C. to 550.degree. C. The process pressure is in the range 2 Torr to 5 Torr. The low frequency power is in the range 0 W to 50 W, and the high frequency power is in the range 90 W to 110 W. The precursor gases of silane, ammonia and nitrogen flow at flow rates in the ratio 240:3200:4000 sccm. The use of the silicon nitride spacer of the invention to form a PFET device having a dual spacer results in a 10% 15% performance improvement compared to a similar PFET device having a silicon nitride spacer formed by a RTCVD process.
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