Semiconductor memory device and method of testing the same
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United States of America Patent
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Issued Date -
Jan 5, 2006
app pub date -
May 10, 2005
filing date -
Jul 5, 2004
priority date (Note) -
Abandoned
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Abstract
The invention discloses a semiconductor memory device and a method of testing the same. The semiconductor memory device comprises a memory for receiving or outputting data in response to a first clock signal; an input converting means for converting and outputting input data in response to a second clock signal; and an output converting means for converting and outputting data outputted from the memory in a first test mode and converting and outputting data outputted from the input converting means in a second test mode, in response to the second clock signal. Therefore, in case that the semiconductor memory device has a plurality of frequency regions, it is possible to recognize which frequency regions among a plurality of frequency regions may be suboptimal.
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