Method of making a semiconductor chip assembly with a metal containment wall and a solder terminal
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United States of America Patent
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Sep 2, 2008
Grant Date -
Jan 19, 2006
app pub date -
Aug 31, 2005
filing date -
Oct 13, 2000
priority date (Note) -
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status (Latency Note)
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Abstract
A method of making a semiconductor chip assembly includes providing a metal base, a routing line, a metal containment wall and a solder layer in which the metal containment wall includes a cavity and the solder terminal contacts the metal containment wall in the cavity, mechanically attaching a semiconductor chip to the routing line, forming a connection joint that electrically connects the routing line and the pad, etching the metal base to reduce contact area between the metal base and the routing line and between the metal base and the metal containment wall, and providing a solder terminal that includes the solder layer.
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