Implementation and management of moveable buffers in cache system

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20060015689A1
SERIAL NO

10891796

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Abstract

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The present invention provides parallel processing of write-back and reload operations in a cache system and optimum circuit utilisation by implementing moveable buffers in a cache storage. However, the data and associated pointers are not permanently assigned to a particular buffer--hence, the buffers can move logically around in the facility. Reload pointer is pointing to an empty entry so that retrieved data from the main memory or equal hierarchy cache on cache miss can be always be accommodated. Victim pointer is always pointing to a modified entry for the next candidate of write-back operation. Write-back operation is necessary with reload operation in order to make a free entry for further cache miss handling unless free entry exists. Because of these moveable pointers for reload buffer and victim buffer and integrated write-back buffer in the cache, intra cache data movement is not necessary which improves cache miss handling performance.

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Patent Owner(s)

Patent OwnerAddress
SONY COMPUTER ENTERTAINMENT INCTOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kim, Roy Moonseuk Austin, TX 12 249
Liu, Peichun Peter Austin, TX 38 574
Okawa, Yasukichi Kawasaki, JP 9 138
Truong, Thuong Quang Austin, TX 38 351

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