Stacked flash memory chip package and method therefor
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United States of America Patent
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N/A
Issued Date -
Feb 2, 2006
app pub date -
Dec 30, 2004
filing date -
Jul 28, 2004
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
This invention discloses a stacked flash memory chip package and a method for the stacked flash memory chip package. A first flash memory chip is mounted on a substrate, in which the first flash memory chip has an inactive surface for adhering to the substrate and a number of bond pads are all disposed on one side of an active surface of the flash memory chip. Then, a second flash memory chip is mounted over the first flash memory chip in a non-alignment manner so that the second flash memory chip shields part of the active surface of the first flash memory chip and that the bond pads of first flash memory chip are exposed. Then, the bond pads of the first flash memory chip and the bond pads of the second flash memory chip are respectively connected to the circuit of the substrate by wire bonding.
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