Dynamic creation and modification of wafer test maps during wafer testing
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United States of America Patent
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app pub date -
Nov 3, 2005
filing date -
Apr 17, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
Methods, systems, and apparatuses provide dynamic creation and modification of wafer test maps. Test plans are defined for a testing session of a wafer lot. The test plan is associated with a number of seed map patterns. During a wafer lot testing session, test results are dynamically obtained and examined at run-time of a test. Moreover, the seed map patterns are overlaid on the test sites defined in the test plan. If the test result statistics are outside of defined threshold tolerance levels, then a new wafer test map is created or modified at run-time, according to corresponding seed map patterns. If seed map patterns are within the intersection of valid test sites, then seed map patterns are created at run-time.
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