Attachment of integrated circuit structures and other substrates to substrates with vias
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United States of America Patent
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N/A
Issued Date -
N/A
app pub date -
Oct 19, 2005
filing date -
Dec 17, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
Vias (210, 210B) are formed in a surface of a substrate. At least portions of contact pads (139, 350) are located in the vias. Contact pads (150, 340) of an integrated circuit structure are inserted into the vias and attached to the contact pads (139, 350) of the substrate. The vias provide a strong, reliable mechanical and electrical connection. A via may expose not only a contact pad (350) in the substrate but also a surrounding region. Solder (930) wets the contact pad better than the surrounding region, resulting in a stronger solder joint and better electrical conductivity. Alternatively, the contact may include multiple conductive layers (910.1, 910.2), with the top layer (910.2) being more solder wettable than the bottom layer (910.1) and the top layer covering only a portion of the bottom layer.
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