Integrated circuit layout having rectilinear structure of objects
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United States of America Patent
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Issued Date -
Apr 13, 2006
app pub date -
Jan 25, 2005
filing date -
Sep 30, 2004
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
An integrated circuit layout pattern is formed from a plurality of objects placed within the layout pattern. Each object has a homogenous communications interface, which is a rectilinear donut structure formed of communications elements surrounding a central object logic area. The communications elements are adapted to route data between the central object logic area and other rectilinear donut structures in the layout pattern.
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