Cyclic flash memory wear leveling
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United States of America Patent
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Oct 21, 2008
Grant Date -
May 18, 2006
app pub date -
Nov 15, 2004
filing date -
Nov 15, 2004
priority date (Note) -
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Abstract
A re-programmable non-volatile memory system, such as a flash EEPROM system, having its memory cells grouped into blocks of cells that are simultaneously erasable is operated in a manner to level out the wear of the individual blocks through repetitive erasing and re-programming. This may be accomplished without use of counts of the number of times the individual blocks experience erase and re-programming but such counts can optionally aid in carrying out the wear leveling process. Individual active physical blocks are chosen to be exchanged with those of an erased block pool in a predefined order.
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