Certified memory-to-memory data transfer between active-active raid controllers
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United States of America Patent
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May 19, 2009
Grant Date -
May 18, 2006
app pub date -
Dec 22, 2005
filing date -
Sep 28, 2001
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Abstract
A system for performing an efficient mirrored posted-write operation having first and second RAID controllers in communication via a PCI-Express link is disclosed. The first bus bridge transmits a PCI-Express memory write request TLP to the second bus bridge. The TLP header includes an indication of whether the first CPU requests a certification that certifies the payload data has been written to the second write cache memory. If the indication requests the certification, the second bus bridge automatically transmits the certification to the first bus bridge independent of the second CPU, after writing the payload data to the second write cache memory. The first bus bridge generates an interrupt to the first CPU in response to receiving the certification. The certified transfer may be used to validate and/or invalidate mirrored copies of a write cache directory on the RAID controllers, among other uses.
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- 15 United States
- 10 France
- 8 Japan
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- 5 Korea
- 2 Other
Patent Owner(s)
- DOT HILL SYSTEMS CORPORATION
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Ashmore, Paul Andrew | Longmont, US | 21 | 1312 |
Davies, Ian Robert | Longmont, US | 28 | 1072 |
Maine, Gene | Erie , US | 12 | 1011 |
Vedder, Rex Weldon | Boulder, US | 6 | 801 |
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