Ultra low-loss CMOS compatible silicon waveguides

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United States of America Patent

APP PUB NO 20060133754A1
SERIAL NO

11314305

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Abstract

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A low loss optical waveguiding structure for silicon-on-insulator (SOI)-based arrangements utilizes a tri-material configuration including a rib/strip waveguide formed of a material with a refractive index less than silicon, but greater than the refractive index of the underlying insulating material. In one arrangement, silicon nitirde may be used. The index mismatch between the silicon surface layer (the SOI layer) and the rib/strip waveguide results in a majority of the optical energy remaining within the SOI layer, thus reducing scattering losses from the rib/strip structure (while the rib/strip allows for guiding along a desired signal path to be followed). Further, since silicon nitirde is an amorphous material without a grain structure, this will also reduce scattering losses. Advantageously, the use of silicon nitride allows for conventional CMOS fabrication processes to be used in forming both passive and active devices.

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Patent Owner(s)

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CISCO TECHNOLOGY INC170 WEST TASMAN DRIVE SAN JOSE CA 95134-1706

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ghiron, Margaret Allentown, PA 35 1252
Gothoskar, Prakash Allentown, PA 56 1658
Patel, Vipulkumar Breinigsville, PA 109 2141
Piede, David Allentown, PA 30 779

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