Gate oxide protected I/O circuit

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20060152255A1
SERIAL NO

11036463

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Abstract

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An integrated circuit comprises a first input node and a second input node, an output node; a first output transistor of a first type and a second output transistor of a second type, and a first clamping transistor of the second type and a second clamping transistor of the second type. The first clamping transistor, the first output transistor, the second clamping transistor, and the second output transistor are coupled in series across a first power supply terminal and a second power supply terminal. The first input node is coupled to a gate of the first output transistor. The second input node is coupled to a gate of the second output transistor. The output node is coupled to a common node of the first output transistor and the second clamping transistor. A gate of the first clamping transistor is coupled to a first reference voltage. A gate of the second clamping transistor is coupled to a second reference voltage.

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Patent Owner(s)

Patent OwnerAddress
ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INCNO 23 INDUSTRY E RD SCIENCE-BASED INDUSTRIAL PARK HSINCHU 300

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Liu, Yi-Heng Taipei City, TW 5 12
Wang, Dar-Woei Hsinchu County, TW 2 5

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