Semiconductor device, method for making pattern layout, method for making mask pattern, method for making layout, method for manufacturing photo mask, photo mask, and method for manufacturing semiconductor device

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United States of America Patent

PATENT NO 7716617
APP PUB NO 20060157833A1
SERIAL NO

11299843

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Abstract

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and in terms of a pattern including the connection area among the at least of Ni circuit patterns, the larger the i, the connection area being arranged at a further position in longitudinal direction.

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Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fujisawa, Tadahito Yokkaichi, JP 47 875
Kotani, Toshiya Machida, JP 132 1394
Maesono, Atsushi Yokohama, JP 5 48
Mashita, Hiromitsu Sagamihara, JP 43 212
Nakano, Ayako Yokohama, JP 13 85

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