Method for updating entries of address conversion buffers in a multi-processor computer system

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United States of America Patent

APP PUB NO 20060168419A1
SERIAL NO

11315055

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Abstract

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A method for the updating of entries of address conversion buffers in a multi-processor computer system, wherein each processor exhibits an address conversion buffer and wherein a page-by-page virtually addressable main memory is provided. A table is provided in the main memory, into which an entry is made for each memory page and each processor as to whether an entry (3) for this memory page is present in the address conversion buffer of the corresponding processor. In the event of a change to the address allocation of a memory page, a message is sent exclusively to such processors that comprise an entry for the corresponding memory page in their address conversion buffer. A multi-processor computer system is disclosed which is suitable for carrying out the method.

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Patent Owner(s)

Patent OwnerAddress
FUJITSU SIEMENS COMPUTERS GMBH80807 MÜNCHEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gross, Jurgen Rosenheim, DE 16 372

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