Systems, methods and devices for providing variable-latency write operations in memory devices
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United States of America Patent
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Aug 29, 2006
Grant Date -
Aug 17, 2006
app pub date -
Feb 11, 2005
filing date -
Feb 11, 2005
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A memory system includes storage cells, a respective one of which is configured to store a fixed charge therein when a write voltage applied thereto is above a predetermined threshold voltage and to discharge the fixed charge therefrom when the write voltage applied thereto is below the threshold voltage. The storage cells may be charged and/or discharged at a latency that is a function of a voltage differential between the write voltage and the threshold voltage. A variable-latency write circuit for the storage cells is configured to dynamically vary the voltage differential between the write voltage and the threshold voltage to provide a variable-latency write operation that stores the fixed charge therein or discharges the fixed charge therefrom. Related methods are also discussed.
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