Bridge between a single channel high speed bus and a multiple channel low speed bus
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United States of America Patent
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Issued Date -
Aug 17, 2006
app pub date -
Feb 17, 2005
filing date -
Feb 17, 2005
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
An apparatus for enabling communication between components in a network device includes a network processor providing data signals based on a PLx format; a multiport I/O controller having an IX bus interface and a plurality of MAC layer interfaces; and a bridge for bi-directionally converting the streaming data from the network processor to the I/O controller.
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