Digital signal processing element having an arithmetic logic unit

United States of America Patent

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Feb 1, 2011
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Aug 24, 2006
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Apr 21, 2006
filing date
Dec 29, 2003

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Abstract

A digital signal processing circuit including: a multiplier circuit; a plurality of multiplexers coupled to the multiplier circuit and controlled by a first opcode; and an arithmetic logic unit coupled to plurality of multiplexers and controlled by a second opcode.

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XILINX INC	2100 LOGIC DRIVE SAN JOSE CA 95124

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G06F:ELECTRIC DIGITAL DATA PROCESSING

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Inventor Name	Address	# of filed Patents	Total Citations
Ching, Alvin Y	Sunnyvale, US	25	1742
New, Bernard J	Carmel Valley, US	108	7995
Schultz, David P	San Jose, US	71	2106
Simkins, James M	Park City, US	38	1947
Thendean, John M	Berkeley, US	17	1026
Vadi, Vasisht Mantra	San Jose, US	31	1273
Wong, Anna Wing Wah	Santa Clara, US	12	812
Wong, Jennifer	Fremont, US	118	5317

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Digital signal processing element having an arithmetic logic unit

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United States of America Patent

11408364

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PATENT NO	7882165
APP PUB NO	20060190516A1
SERIAL NO	11408364
DOCKET NO

US Family Size	Non-US Coverage
Patent Longevity	Forward Citations

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
February 01, 2011	US,7882165,B2 US7882165B2	GRANTED PATENT AS SECOND PUBLICATION
August 24, 2006	US,20060190516,A1 US20060190516A1	FIRST PUBLISHED PATENT APPLICATION

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11408364

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