HS-DSCH transmitter and CRC calculator therefor in a W-CDMA system
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United States of America Patent
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N/A
Issued Date -
Aug 31, 2006
app pub date -
Feb 28, 2006
filing date -
Feb 28, 2005
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
An HS-DSCH transmitter in a W-CDMA system is provided. In the HS-DSCH transmitter, a memory stores input transmission data. A bit scrambling code ROM stores random sequences for bit scrambling of the input data. A CRC calculator generates a bit scrambled sequence by attaching a CRC to the input transmission data and multiplying the CRC-attached data by a random sequence read from the bit scrambling code ROM. First and second turbo encoder input memories store the bit scrambling sequence. A turbo encoder & rate matcher reads the same bit scrambling sequence from the first and second encoder input memories, generates a systematic sequence, a first parity sequence, and a second parity sequence by turbo-encoding the read bit scrambling sequence, and rate-matches the sequences. First, second and third rate matching memories store the rate-matched sequences, respectively.
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