Digital signal processing circuit having a pattern detector circuit for convergent rounding
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United States of America Patent
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Dec 14, 2010
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app pub date -
May 12, 2006
filing date -
Dec 29, 2003
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Abstract
An integrated circuit (IC) for convergent rounding including: an adder circuit configured to produce a summation; a comparison circuit configured to bitwise compare the summation with an input pattern, bitwise mask the comparison using a mask, and combine the masked comparison to produce a comparison bit; and rounding circuitry for rounding the summation based at least in part on the comparison bit.
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